On-Chip SRAM Management: Cache, Scratchpad, and Dedicated Buffers

SourcesSurvey §3.2 and Fig. 5; NVIDIA and AWS Neuron layer mappings.

1.9.1SRAM Array, Bank, Ports, and Access Latency#

1.9.2Hardware-Managed Cache and Software-Managed Scratchpad#

1.9.3The GPU L1/Shared Memory/L2 Hybrid Hierarchy#

1.9.4NPU Scratchpad and Spatial-Dataflow PE-Local SRAM#

1.9.5Bank Conflict, Address Mapping, Swizzle, and Multicast#

1.9.6Double Buffering, Prefetch, Data Residency, and Capacity Allocation#

1.9.7Dedicated Accumulator Buffers and Tensor Memory#

1.9.8On-Chip Memory Capacity, Bandwidth, Area, and Management Complexity#