DRAM and External Memory Interfaces

1.10.1DRAM Cell, Row, Bank, Bank Group, and Channel#

1.10.2Row Buffer, Burst Transfer, and Access Timing#

1.10.3DDR, LPDDR, GDDR, and HBM#

1.10.4HBM Stack, Channel, and Pseudo-Channel#

1.10.5Memory Controller and Request Scheduling#

1.10.6Bandwidth Utilization, Access Granularity, and Read/Write Turnaround#

1.10.7ECC, Refresh, and Capacity/Bandwidth Trade-offs#