AI Architecture & Systems

On-Chip Interconnect and Synchronization

1.12.1Bus, Crossbar, Ring, and Mesh NoC#

1.12.2Unicast, Multicast, and Reduction Networks#

1.12.3Routing, Arbitration, Flow Control, and Backpressure#

1.12.4On-Chip Bandwidth, Hop Count, and Congestion#

1.12.5Multi-Core Shared Memory and Coherence Boundaries#

1.12.6Topology Between Compute Arrays and Memory Controllers#